1. Field of the Invention
The present invention relates generally to semiconductor devices. More particularly, the present invention relates to packaging of semiconductor devices.
2. Background Art
Optimization of electrical and thermal performance is an important consideration for high frequency, high voltage power applications. It is known to use a conductive clip to provide a high performance interconnect between a transistor and input/output terminals within a package. Additionally, by exposing the conductive clip to the outside of the package, enhanced thermal dissipation may be provided, for example by affixing a heat sink to the exposed area of the conductive clip.
Multiple transistors are often required in high-power circuit applications; for example, high power transistors connected in parallel by a common drain. Additionally, a driver integrated circuit (IC) (or a “gate driver”) is necessary to drive and control the transistors.
Conventionally, the driver IC and the transistors may be individually packaged and disposed on a shared support surface, such as a printed circuit board (PCB). However, the routing of current lines through the PCB negatively affects electrical performance, and the form factor of the individual packages requires significant area to be reserved on the PCB, adding cost and complexity.
Thus, a unique and cost-effective solution is needed to support the efficient design and operation of high power circuit applications while providing enhanced thermal dissipation and a compact form factor.